L1-Cache Access Fail Interrupt enable register
L1_ICACHE0_PLD_DONE_INT_ENA | The bit is used to enable interrupt of L1-ICache0 preload-operation. If preload operation is done, interrupt occurs. |
L1_ICACHE1_PLD_DONE_INT_ENA | The bit is used to enable interrupt of L1-ICache1 preload-operation. If preload operation is done, interrupt occurs. |
L1_ICACHE2_PLD_DONE_INT_ENA | Reserved |
L1_ICACHE3_PLD_DONE_INT_ENA | Reserved |
L1_DCACHE_PLD_DONE_INT_ENA | The bit is used to enable interrupt of L1-DCache preload-operation. If preload operation is done, interrupt occurs. |
SYNC_DONE_INT_ENA | The bit is used to enable interrupt of Cache sync-operation done. |
L1_ICACHE0_PLD_ERR_INT_ENA | The bit is used to enable interrupt of L1-ICache0 preload-operation error. |
L1_ICACHE1_PLD_ERR_INT_ENA | The bit is used to enable interrupt of L1-ICache1 preload-operation error. |
L1_ICACHE2_PLD_ERR_INT_ENA | Reserved |
L1_ICACHE3_PLD_ERR_INT_ENA | Reserved |
L1_DCACHE_PLD_ERR_INT_ENA | The bit is used to enable interrupt of L1-DCache preload-operation error. |
SYNC_ERR_INT_ENA | The bit is used to enable interrupt of Cache sync-operation error. |